Design Verification Engineer
We are expanding our Design Verification team, and invite you to explore Space with us! The job includes taking a viable role in the VLSI verification tasks of Ramon.Space line of products.
What you will be doing
- Define the DV plan including DV requirements, Architecture, Test plan and deliverables.
- Implementation of UVM / DVE components.
- Conduct status and progress review
- Take part of block level to full chip/FPGA level DV, including Debug and GLS.
- Develop scripts in various scripting languages for supporting the DV / VLSI automation.
- Experienced Design Verification Engineer with Solid DV background.
- Hands on with Definition and Execution of DV Test benches in UVM, System Verilog.
- Hands on and ownership of DV module verification from definition to Signoff.
- Solid knowhow of ASIC and FPGA design flow.
- Solid knowhow of Digital System Design.
- Independent, team player with good team spirit